Digital Systems Design

Class Schedule

ECE 382 Section 1 Spring Semester 2004

This schedule lists class material that is expected to be covered by the dates indicated. All listed assignments and exams are subject to change. Any changes will be discussed in class.

The textbook sections should be read before class and homework problems should be considered assigned at each date listed.

Last update: January 8, 2004, 08:04

Lecture	Topic	Homework
Jan 12, 2004 (M)	1-1 Digital Systems 1-2 Binary Numbers 1-3 Number Base Conversions 1-4 Octal and Hex Numbers	Read chapter 1. Chapter 1 problems: 3, 8, 10, 11, 16, 18, 28, 32
Jan 14, 2004 (W)	1-5 Complements 1-6 Signed Binary Numbers 1-7 Binary Codes 1-8 Binary Storage and Registers 1-9 Binary Logic	Read 2-1 through 2-3.
Jan 19, 2004 (M)	NO CLASS - Martin Luther King Jr. Holiday
Jan 21, 2004 (W)	2-1 Basic Definitions 2-2 Axiomatic Definition of Boolean Algebra 2-3 Basic Theorems and Properties	Read 2-4 through 2-7. Chapter 2 proplems: 6, 9, 14, 18, 20
Jan 26, 2004 (M)	2-4 Boolean Functions 2-5 Cononical and Standard Forms 2-6 Other Logic Operations 2-7 Digital Logic Gates	Read 3-1 through 3-5.
Jan 28, 2004 (W)	3-1 Map Method 3-2 Four-Variable Map 3-4 POS Simplification 3-5 Don’t Care Conditions	Read 3-6 through 3-9. Chapter 3 problems: 1, 5, 13, 15, 18, 19 Quiz: Chapters 1 & 2.
Feb 2, 2004 (M)	3-6 NAND and NOR Implementatoins 3-7 Other Two-Level Implementations 3-8 Exclusive-OR Function 3-9 HDL	Read 4-1, 4-2, and 4-11.
Feb 4, 2004 (W)	4-1 Combinational Circuits 4-2 Analysis Procedure 4-11 HDL for Combinational Circuits	Read 4-3 through 4-4. Chapter 4 problems: 5, 9, 10, 28, 32, 38, 39, 44.
Feb 9, 2004 (M)	4-3 Design Procedure 4-4 Binary Adder-Subtractor	Study for Exam 1. Quiz: Chapter 3.
Feb 11, 2004 (W)	Exam 1 (Chapters 1 – 3)	Read 4-5 through 4-7.
Feb 16, 2004 (M)	4-5 Decimal Adder 4-6 Binary Multiplier 4-7 Magnitude Comparator	Read 4-8 through 4-10
Feb 18, 2004 (W)	4-8 Decoders 4-9 Encoders 4-10 Multiplexers	Read 5-1 through 5-3.
Feb 23, 2004 (M)	5-1 Sequential Circuits 5-2 Latches 5-3 Flip-Flops	Read 5-4 and 5-5. Chapter 5 problems: 2, 6, 10, 17, 18, 30.
Feb 25, 2004 (W)	5-4 Analysis of Clocked Sequential Circuits 5-5 HDL for Sequential Circuits	Read 5-6. Quiz: Chapter 4.
Mar 1, 2004 (M)	5-6 State Reduction and Assignment	Read 5-7, 6-1, and 6-2.
Mar 3, 2004 (W)	5-7 Design Procedure 6-1 Registers 6-2 Shift Registers	Read 6-3 through 6-4. Chapter 6 problems: 6, 10, 28, 36, 38.
Mar 8, 2004 (M)	NO CLASS - Spring Break
Mar 10, 2004 (W)	NO CLASS - Spring Break
Mar 15, 2004 (M)	6-3 Ripple Counters 6-4 Synchronous Counters	Read 6-5 and 6-6.
Mar 17, 2004 (W)	6-5 Other Counters 6-6 HDL for Registers and Counters	Read 7-1 through 7-3. Quiz: Chapter 5.
Mar 22, 2004 (M)	7-1 Introduction 7-2 Random-Access Memory 7-3 Memory Decoding	Read 7-4 through 7-6. Chapter 7 problems: 1, 8, 17
Mar 24, 2004 (W)	7-4 Error Detection and Correction 7-5 Read-Only Memory 7-6 Programmable Logic Array	Read 7-7 and 7-8. Quiz: Chapter 6.
Mar 29, 2004 (M)	7-7 Programmable Array Logic 7-8 Sequential Programmable Devices	Read 8-1 and 8-2.
Mar 31, 2004 (W)	8-1 RTL Notation 8-2 RTL in HDL	Study for Exam 2.
Apr 5, 2004 (M)	Exam 2 (Chapters 4 – 7)	Read 8-3 through 8-5.
Apr 7, 2004 (W)	8-3 Algorithm State Machines 8-4 Design Example 8-5 HDL Description of Design Example	Read 8-6 and 8-7.
Apr 12, 2004 (M)	8-6 Binary Multiplier 8-7 Control Logic	Read 8-8, 8-9, and 9-1.
Apr 14, 2004 (W)	8-8 HDL Description of Binary Multiplier 8-9 Design with Multiplexers 9-1 Asynchronous Sequential Logic
Apr 19, 2004 (M)	Computer Organization and Design Fetch, Decode, Execute
Apr 21, 2004 (W)	Registers Instructions
Apr 26, 2004 (M)	Instructions Addressing Modes
Apr 28, 2004 (W)	Machine Language Programming Assembly Language Programming
	Final Exam – Comprehensive.